Combinational Logic Design: Parity Checkers

Combinational Logic Design: Parity Checkers

1. What is a Parity Checker?

A parity checker is a digital circuit used to detect errors in binary data transmission or storage. It checks whether the number of 1s (or 0s) in a data word is even or odd. Parity checkers are commonly used in communication systems, memory systems, and error detection systems to ensure data integrity.

• Even Parity: A parity system where the number of 1s in the data word is even. If the count of 1s is odd, the parity checker will signal an error.
• Odd Parity: A parity system where the number of 1s in the data word is odd. If the count of 1s is even, the parity checker will signal an error.

The main goal of a parity checker is to verify the correctness of the data by comparing the calculated parity bit with the transmitted or stored parity bit.

2. Basic Concept of Parity Check

For a given set of binary bits, a parity checker calculates the parity bit to ensure that the total number of 1s in the data word (including the parity bit) meets the required parity condition (either even or odd).

For example, if we have the data bits 101101:

• Even Parity: The number of 1s is 4, which is already even. So, the parity bit would be 0 to keep the parity even.
• Odd Parity: The number of 1s is 4, which is even, so the parity bit would be 1 to make the total count of 1s odd.

3. Structure of a Parity Checker

A parity checker typically uses an XOR (exclusive OR) gate to perform the parity check. XOR gates have the following property:

• XOR operation: The output is 1 if the number of 1s in the input is odd, and 0 if the number of 1s is even.

Working of a Parity Checker:

• A parity checker takes as input the data word and checks the number of 1s in the input.
• If it’s designed for even parity, the output will indicate whether the data word has an even number of 1s. If the number of 1s is odd, the output signals an error.
• For odd parity, the output indicates if the data word has an odd number of 1s, and signals an error if the count is even.

Example:

Consider a 4-bit word 1011. To perform a parity check:

1. Even Parity Check: We count the 1s:

   • Number of 1s = 3 (which is odd).
   • The parity checker should output 1 to indicate an error because the number of 1s is not even.

2. Odd Parity Check: We count the 1s:

   • Number of 1s = 3 (which is odd).
   • The parity checker should output 0 (no error) because the number of 1s is odd.

Truth Table for Even Parity Checker:

Let’s consider a 4-bit input data word D = D3 D2 D1 D0:

• The parity checker checks the number of 1s in D3 D2 D1 D0 and calculates the parity bit to verify if the total number of 1s is even.

4. Types of Parity Checkers

• Even Parity Checker: Ensures that the total number of 1s in the data word (including the parity bit) is even.
• Odd Parity Checker: Ensures that the total number of 1s in the data word (including the parity bit) is odd.

5. Applications of Parity Checkers

• Error detection in data transmission: In digital communication systems, parity checkers help detect single-bit errors during transmission.
• Memory systems: Parity checkers are used in memory systems to ensure that the data stored is correct.
• Data integrity verification: Used in systems where data accuracy is critical, such as in computer networks or file storage.

6. Conclusion

A parity checker is a simple yet effective combinational logic circuit used to verify the correctness of transmitted or stored data based on the number of 1s (parity). It relies on XOR gates to perform the check and determine whether the data word adheres to the desired parity condition (even or odd).